SiliconReef
Banner

Development Process

Development Process

Our consolidated and mature design process brings out high quality products with defined interactions and time schedule.

Requirements (Customer and Application Engineer) – Duration (1-2 weeks)

  • Capture customer requirements
  • Fill-in Customer Requirements Checklist
  • Write IC Specification document

Quote (Sales Department) – Duration (1-2 days)

  • Analyze NRE
  • Evaluate unit price
  • Estimate effort and schedule
  • Provide quote

Architecture & Partitioning (Team Engineer) – Duration (2 weeks)

  • Analyze IC requirements and functionality
  • Determine IC Architecture
  • Update IC Specification document
  • Preliminary Block Specification documents

IC Modeling (Customer and Team Engineer) – Duration (2-6 weeks)

  • Behavioral models of internal blocks
  • Simulation of blocks behavioral models
  • Updated Block Specification documents
  • Integration into IC behavioral model
  • Simulation of IC behavioral model
  • Updated IC Specification document

Block Design (Team Engineer) – Duration (4-6 weeks each)

  • Determine internal block architecture
  • Detail Block Specification document
  • Implement and validate block schematic
  • Block transistor level schematic capture
  • Design of test interface and schematic capture
  • Simulation
  • Layout
  • DRC and LVS
  • Back annotation/parasitic extraction
  • Post Layout Simulation
  • Update Block Specification document

IC Verification (Team Engineer) – Duration (2-8 weeks)

  • Elaborate IC verification plan
  • Run IC behavioral simulations
  • Identify and fix issues
  • Re-run IC behavioral simulations
  • Update IC verification plan

Chip Assembly (Team Engineer) – Duration (4-12 weeks)

  • Integrate core
  • Define I/O strategy and integrate with core
  • Post Layout Simulation of whole chip
  • Tape-out

Silicon Validation (Customer and Team Engineer) – Duration (4-8 weeks)

  • Elaborate IC test plan
  • Bring-up preparation
  • Bring-up tests
  • Update IC test plan